Semesterside for FYS4220 - H?st 2015

Fagl?rere

Some of you have experienced problems when using the Nios-II/e Gen 2 processor. If you have problems connecting to the FPGA and downloading the software to the Nios-II system the solution is to change the cpu type to a Nios-II/e classic in the Qsys builder. Remember to reconnect all interfaces including, for the relevant devices, the interrupt priority and associated priority level. 

The Gen 2 processor was first available in version 14.0 of Quartus, but maybe still as a beta-version. If you are using Quartus 15.0 it should work fine.

7. nov. 2015 16:47

The Lab. 3 assignment has been updated to include the ASM diagram of i2c_master_ctrl.vhd.

20. okt. 2015 19:54

Presentation of an example solution for the controller state machine in Lab3 +  further introduction to Lab4. See updated lecture plan. Introduction to RTOS moved to Oct. 27.

20. okt. 2015 07:52

The deadline for lab. 3 has been extended to Tuesday Oct. 27.

19. okt. 2015 16:04